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Observation of Single Electron Tunneling and Ballistic Transport in Twin Silicon Nanowire MOSFETs (TSNWFETs) Fabricated by Top-Down CMOS Process

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9 Author(s)
Keun Hwi Cho ; Device Research Team, R & D Center, Samsung Electronics Co., San 24, Kiheung-Eup, Yongin-city, Gyeonggi-Do, 449-711 Korea; Department of Electronics and Computer Engineering, Korea University, 5-1, Anam-Dong, Sungbuk-Gu, Seoul, 136-701 Korea. Phone: +82-31-209-6668, Fax: +82-31-209-9861, E-mail: keunhwi.cho@samsung.com ; Sung Dae Suk ; Yun Young Yeoh ; Ming Li
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the authors report transport experiments on gate-all-around (GAA) TSNWFETs fabricated by top-down CMOS processes. The nanowire with 45 nm gate length exhibits single electron tunneling, and the total capacitance extracted from the measured data is in good agreement with the self-capacitance of an ideal cylinder. The nanowire with 125 nm gate length shows conductance quantization suggesting ballistic transport. The temperature dependence of the conductance steps is consistent with the crossover from classical to ballistic

Published in:

2006 International Electron Devices Meeting

Date of Conference:

11-13 Dec. 2006