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Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications

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4 Author(s)
Agosta, G. ; Dipt. di Elettronica e Informazione, Politecnico di Milano ; Breveglieri, L. ; Pelosi, G. ; Sykora, M.

Tiled architectures are emerging as an architectural platform that allows high levels of instruction level parallelism. Traditional compiler parallelization techniques are usually employed to generate programs for these architectures. However, for specific application domains, the compiler is not able to effectively exploit the domain knowledge. In this paper, we propose a new programming model that, by means of the definition of software function units, allows domain-specific features to be explicitly modeled, achieving good performances while reducing development times with respect to low-level programming. Identity-based cryptographic algorithms are known to be computationally intensive and difficult to parallelize automatically. Recent advances have led to the adoption of embedded cryptographic coprocessors to speed up both traditional and identity-based public key algorithms. Custom-designed coprocessors have high development costs and times with respect to general purpose or DSP coprocessors. Therefore, the proposed methodology can be effectively employed to reduce time to market while preserving performances. It also represents a starting point for the definition of cryptography-oriented programming languages. We prove that tiled architecture well compare w.r.t. competitors implementations such as StrongARM and FPGAs

Published in:

Information Technology, 2007. ITNG '07. Fourth International Conference on

Date of Conference:

2-4 April 2007