Referenced Items are not available for this document.
Hot spot occurrence in integrated circuit (IC) packages is common nowadays as current density in the package increases. While electrical and thermal models are constructed to tackle the problem, however the models are loosely coupled between electrical and thermal phenomena. This paper derives an electrical-thermal co-simulation methodology that is validated by measurement on temperature distribution and hot spots in multi-layer IC packages.
Published in:
Electronics Packaging Technology Conference, 2006. EPTC '06. 8th
Date of Conference: 6-8 Dec. 2006
- Page(s):
- 849 - 852
- E-ISBN :
- 1-4244-0665-X
- Print ISBN:
- 1-4244-0664-1
- INSPEC Accession Number:
- 9518427
- Conference Location :
- Singapore
- Digital Object Identifier :
- 10.1109/EPTC.2006.342823
- Product Type:
- Conference Publications
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