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Browse Journals & Magazines > Computers and Digital Techniq ...> Volume:137 Issue:1 Help

Hierarchical design of delay-insensitive systems

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2 Author(s)
Lam, P.N. ; Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada ; Li, H.F.

A set of building blocks is presented for the hierarchical design of delay-insensitive systems. It consists of delay-insensitive (DI) building blocks and hybrid (non-DI) building blocks. An extended signal transition graph (STG) model is used for circuit specification and analysis. It permits the clear specification of delay-insensitive circuits, distinguishing between environment/module behaviour and DI/non-DI components. A hierarchical composition procedure is described for the composition of deterministic STG specifications. As an example, a circuit for distributed mutual exclusion is designed and implemented.

Published in:
Computers and Digital Techniques, IEE Proceedings E  (Volume:137 ,  Issue: 1 )

Date of Publication: Jan 1990

Page(s):
41 - 56
ISSN :
0143-7062
INSPEC Accession Number:
3582720
Product Type:
Journals & Magazines
Date of Current Version :
02 May 2005
Issue Date :
Jan 1990

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