By Topic

Analytical results to account for delay measurement errors of high-speed VLSI devices

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Mokari-Bolhassan, M.E. ; Dept. of Electr. & Comput. Eng., Ohio Univ., Athens, OH, USA

The transmission line effect in modern automatic test equipment (ATE) has been a major concern in measuring the timing of VLSI chips. The new version of test head has tried to terminate the transmission lines in matched loads at the comparator ends of the lines. This has eliminated the ringing effect. However, the new loading conditions for measurements are not likely to be according to specifications. Analytical results have been developed to correct the measurement errors incurred by different loading conditions. Chip-to-chip process variations have been incorporated

Published in:

Circuits and Systems, IEEE Transactions on  (Volume:36 ,  Issue: 11 )