Crosstalk induced faults, like delay faults and glitch faults, are becoming important to test for high density SoCs operating at high clock speeds. In this paper, the authors propose a methodology for at-speed testing of glitch faults in links connecting two distinct clock domains in a SoC or a NoC system. The basic idea is to try to create conditions using maximum number of aggressors to induce a glitch in the link to be tested for faults and use a latch to record this glitch. The authors illustrate our ideas for testing glitch faults in handshaking signals used for communication between two NoC switches. BIST structure for off-line testing of these faults is also briefly described
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Norchip Conference, 2006. 24th
Date of Conference: Nov. 2006