By Topic

Off-line Testing of Crosstalk Induced Glitch Faults in NoC Interconnects

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Tomas Bengtsson ; Jönköping University, Sweden ; Shashi Kumar ; Raimund Ubar ; Artur Jutman

Crosstalk induced faults, like delay faults and glitch faults, are becoming important to test for high density SoCs operating at high clock speeds. In this paper, the authors propose a methodology for at-speed testing of glitch faults in links connecting two distinct clock domains in a SoC or a NoC system. The basic idea is to try to create conditions using maximum number of aggressors to induce a glitch in the link to be tested for faults and use a latch to record this glitch. The authors illustrate our ideas for testing glitch faults in handshaking signals used for communication between two NoC switches. BIST structure for off-line testing of these faults is also briefly described

Published in:

2006 NORCHIP

Date of Conference:

20-21 Nov. 2006