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Circuit Techniques for CMOS Divide-By-Four Frequency Divider

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4 Author(s)
Jang, S.-L. ; Dept. of Electron. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei ; Chuang, Y.-H. ; Lee, S.-H. ; Chao, J.-J.

This letter describes circuit techniques for obtaining divide-by-four (divide4) frequency dividers (FDs) from CMOS ring-oscillator based injection locked frequency dividers (ILFDs). The circuit is made of a two-stage differential CMOS ring oscillator and is based on MOS switches directly coupled to the differential outputs of the ring oscillator. At the supply voltage of 1.8V and at the incident power of 0dBm, for a dual-band ILFD, the divide4 ILFD can provide a locking range of 6.3% from 5.39 to 6.12GHz at low band and 5.9% from 8.84 to 9.38GHz at high band when the dc bias of MOS switches Vinj changes from 0.7 to 1.1V

Published in:

Microwave and Wireless Components Letters, IEEE  (Volume:17 ,  Issue: 3 )