By Topic

A 5 GHz I/Q Phase-tunable CMOS LC Quadrature VCO (PT-QVCO) for Analog Phase Calibrated Receiver Architectures

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Ibrahim R. Chamas ; Wireless Microsystems Laboratory, Bradley Department of ECE, Virginia Polytechnic Institute and State University, Blacksburg, VA 24061, USA. Email: ichamas@vt.edu ; Sanjay Raman

This paper presents a 5-GHz phase-tunable I/Q signal generator in a 0.18 mum RF CMOS process based on the parallel cross-coupling of two -GM LC VCOs (QVCO). The proposed circuit achieves an ultra-wide I/Q phase tuning range without affecting the relative amplitude error or consuming additional power or chip area. Additionally, in restoring the phase balance, it is observed that the proposed method improves phase noise performance. Time domain measurements show that the two VCOs, prior to phase tuning, are quadrature locked with a 0.8deg phase imbalance and 1.4% relative amplitude error. In agreement with previously developed analysis, I/Q signals with phase error up to ~plusmn30 , beyond which the VCO cores are unlocked, can be driven to perfect quadrature phase. The PT-QVCO can be tuned from 3.87-4.45 GHz for the negative mode, and 4.4-5.4 GHz for the positive mode, a total of ~1.5 GHz. The fabricated circuit including pad structures occupies an area of 1.1 times 0.7 mm2 and drains 18mW (excluding buffer circuits) from a 1.8 V supply voltage

Published in:

2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

Date of Conference:

10-12 Jan. 2007