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Design of a Distributed Amplifier with On-chip ESD Protection Circuit in 130 nm SOI CMOS Technology

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6 Author(s)
M. Si Moussa ; Student Member, IEEE, Microwave Lab., Université catholique de Louvain, 3, Place du Levant, 1348 Louvain-la-Neuve, Belgium. Phone: +32 (0)10478099, Fax: +32 (0)10478705, e-mail: ; M. El Kaamouchi ; G. Wybo ; A. Bens
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A fully integrated common source distributed amplifier (CSDA) with ESD protection, designed and fabricated in 130 nm SOI CMOS technology, is presented. This CSDA requires a chip area of 0.75 mm2 . A gain of 4.5 dB and a unity-gain bandwidth of 30 GHz are measured at 1.4 V supply voltage with a measured power consumption of 66 mW. Low capacitance diode is used for electrostatic discharge (ESD) protection for the RF input pin without altering the original design of the CSDA. The CSDA has an ESD protection level up to 1.45 A transmission line pulse (TLP) current, corresponding to 2 kV human body model (HBM) stress

Published in:

2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

Date of Conference:

10-12 Jan. 2007