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Parallelized Full Package Signal Integrity Analysis Using Spatially Distributed 3D Circuit Models

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6 Author(s)
Krauter, B. ; IBM Syst. & Technol. Group, IBM Corp., Austin, TX ; Beattie, M. ; Widiger, D. ; Hao-Ming Huang
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Full package signal integrity analysis is parallelized in a suite of tools called PATS (package analysis tool suite). PATS extracts sparse circuit models using a segment-to-segment BEM (boundary element method) algorithm for both capacitance and inverse inductance and uses a fixed-time step circuit simulator to create time-domain scattering models. Critical issues regarding the parallelization of PATS and segment-to-segment BEM circuit models are explored. Examples demonstrating the accuracy of this approach are presented for real packaging cases

Published in:

Electrical Performance of Electronic Packaging, 2006 IEEE

Date of Conference:

23-25 Oct. 2006