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Per-Pixel Floating-Point ADCs with Electronic Shutters for a High Dynamic Range, High Frame Rate Infrared Focal Plane Array

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3 Author(s)
Sang-Min Lee ; Center for Integrated Syst., Stanford Univ., CA ; Hyunsik Park ; Wooley, B.A.

A per-pixel floating-point, dual-slope A/D converter (ADC) array for a 16 times 16 long wavelength infrared detector array has been integrated in a 0.18-mum CMOS technology. To achieve a high dynamic range and high frame rate simultaneously, an electronic shutter is combined with an ADC for each pixel. A unique method of comparator offset cancellation, employing an integration capacitor with digital calibration, improves the uniformity of the array. The experimental prototype achieves a 19-bit dynamic range and 8-bit resolution at 3 kfps, with a power consumption of only 7 muW/pixel. Each per-pixel ADC occupies 4000 mum2 and is well-suited to 3-dimensional integration

Published in:

Custom Integrated Circuits Conference, 2006. CICC '06. IEEE

Date of Conference:

10-13 Sept. 2006