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Gain control elements are widely used in communication systems both to limit the incident power to the circuitry and to control the amplitude of the transmitted signal. Attenuators are one way of controlling the signal amplitude. The distortion performance of common CMOS attenuator topologies is investigated in this work. CMOS device equations that model the device in different regions of operation and which also model short channel effects are used for calculating distortion performance. Calculated distortion is compared with simulation results and experimental data, and qualitative explanations of the distortion curves as well as the deviation between different sources of data are given. Potential improvements in linearity performance of attenuators via circuit design techniques have also been discussed.
Date of Publication: March 2007