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A full custom VLSI design methodology using Mentor Graphics design software in an educational environs

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3 Author(s)
T. K. Schneider ; Virginia Univ., Charlottesville, VA, USA ; A. J. Schwab ; J. H. Aylor

An 8-b arithmetic logic unit (ALU) was schematic-captured, simulated, physically designed, and resimulated with parasitics using Mentor Graphics design tools and a full custom methodology. The design can be fabricated with confidence that it will perform as expected. The design has demonstrated how a commercial design tool can effectively be used in an educational environment. Many tool related issues that came up were resolved using resources at hand, or with the help of external resources such as the software vendor, fabrication facility, or uses at other educational institutions. Students benefit from this effort because they can use commercial tools to understand important VLSI performance issues

Published in:

ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International

Date of Conference:

27 Sep-1 Oct 1993