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Next generation environment for extremely fast test pattern generation

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2 Author(s)
G. Pulini ; Mentor Graphics Europe, UK ; S. Hamacher

The importance of test in ASIC and IC design is discussed, and some new design-for-test (DFT) strategies are presented. The advantages of a specific method for test vector creation and validation that tightly links two scan-test tools into the target design flow are described. These tools are a sequential, partial-scan automatic test pattern generator (ATPG) and an ATPG optimized for full-scan designs. Some customer results with these tools are presented as well

Published in:

Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European

Date of Conference:

20-24 Sep 1993