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The CALLAS synthesis system and its application to mechatronic ASIC design problems

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2 Author(s)
Windirsch, P. ; Inst. of Microelectron. Syst., Darmstadt Univ. of Technol., Germany ; Duzy, P.

The authors demonstrate the use of high-level synthesis for ASIC designs in the mechatronic application domain. The first chip synthesized and fabricated is part of a distance measurement system. Only six weeks were needed for the design of the 2700 equivalent gates ASIC. The hand-crafted standard cell design had taken four times as long for a result of comparable size and performance. Similar results have been obtained in a second ASIC project, which is part of a friction clutch controller

Published in:

Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European

Date of Conference:

20-24 Sep 1993