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Performance Evaluation of a Preloading Model in Dynamically Reconfigurable Processors

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2 Author(s)
Papademetriou, K. ; Dept. of Electron. & Comput. Eng., Crete Tech. Univ., Chania ; Dollas, A.

Dynamic reconfiguration allows for the reuse of the same hardware by different tasks of an application at different stages of its execution. However, reconfiguring the hardware at run-time incurs a configuration delay causing performance degradation of the application. This paper evaluates a preloading model that hides the configuration overhead. An existing preloading model is augmented according to the physical constraints of the system. A reduction of 6% up to 86% in execution time has been obtained with the new model

Published in:

Field Programmable Logic and Applications, 2006. FPL '06. International Conference on

Date of Conference:

28-30 Aug. 2006