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Modeling and simulation of mixed-signal electronic designs - Enabling analog and discrete subsystems to be represented uniformly within a single framework

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2 Author(s)
Ghosh, S. ; Dept. of Comput. Sci., Texas Univ., Tyler, TX ; Giambiasi, N.

This article has presented for the first time a scientific and mathematically sound principle that enables both analog and discrete subsystems to be represented uniformly within a single framework, thereby facilitating their simultaneous and uniform simulation within the same simulator. While the combination of the laboratory prototype analog subsystem simulator, DiamSim, and available discrete-event simulators such as VHDL constitute necessary and sufficient proof of the principle, the article outlines how a unified language and execution environment, nVHDL, may be realized for the future. In the coming age of networked computational systems (NCS), future complex systems will include analog hardware, synchronous and asynchronous discrete hardware, software, and inherently asynchronous networks that will interconnect both stationary and mobile entities, all governed by asynchronous control and coordination algorithms (Ghosh,2006). Paul (2006) believes that the current object-oriented programming is being quickly obsoleted by the increasing demands of net-centric warfare and that a dynamic, service-oriented architecture is critically needed to address key future needs of the US DoD. Logic dictates that nVHDL will likely play a key role in the development of a whole new approach, networked computational systems design language and execution environment (NCSDL). that will consist of a language in which complex systems may be described accurately and an execution environment that will permit the realistic execution of the executable description on a testbed to assess the system correctness, reliability, safety, security, and other performance parameters. Furthermore, to obtain results quickly for large systems and use them in iterating system designs, the testbed must consist of a network of workstations configured as a loosely-coupled parallel processor

Published in:

Circuits and Devices Magazine, IEEE  (Volume:22 ,  Issue: 6 )