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Analog CMOS implementation of neural network for adaptive signal processing

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2 Author(s)
Hwa-Joon Oh ; Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA ; Salam, F.M.A.

A modular analog CMOS artificial neural network is designed and fabricated for adaptive signal processing. A modified Gilbert multiplier is used as a linear combination of several input signals. Modified back-propagation continuous-time learning rules are used as an adaptive algorithm. The adaptive algorithm adjusts the weights in real time by on-chip learning circuits. Hardware learning circuits are simulated using PSPICE, then layout design of a modular chip is fabricated via the MOSIS services. We report on the chip test results which demonstrate the successful operation of the chip in 3 adaptive filtering scenarios

Published in:
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on  (Volume:6 )

Date of Conference: 30 May-2 Jun 1994

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