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CMOS implementation of associative memory using cellular neural network having adjustable template coefficients

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3 Author(s)
A. Paasio ; Electron. Circuit Design Lab., Helsinki Univ. of Technol., Espoo, Finland ; K. Halonen ; V. Porra

A new way of implementing a cellular neural network cell using simple differential stages is described. Also some aspects for implementing associative memory with this new structure are discussed

Published in:

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94  (Volume:6 )

Date of Conference:

30 May-2 Jun 1994