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A case study of mixed-signal integrated circuit testing: an application of current testing using the upper limit and the lower limit

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3 Author(s)
Miura, Y. ; Dept. of Electron. & Inf. Eng., Tokyo Metropolitan Univ., Japan ; Naito, S. ; Kinoshita, K.

Many recent ASICs include both analog and digital circuits, called mixed-signal integral circuits, to realize required functions on one chip. The comparator circuit is a principal element in the mixed-signal integrated circuit. In this paper we discuss a method for testing CMOS comparators. The method is current testing using both the upper limit and the lower limit. Bridging faults and break faults are assumed on the circuit layout and are analyzed by a circuit simulator. We examine the efficiency of fault detection by current testing. The result of the test shows that the proposed testing method has the highly fault coverage more than 94 percent

Published in:
Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on  (Volume:5 )

Date of Conference: 30 May-2 Jun 1994

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