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VLSI array processors implementation of block-state IIR digital filters

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3 Author(s)
A. Tawfik ; Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada ; F. El-Guibaly ; P. Agathoklis

In this paper, an efficient (in the AT and AT2 senses) systolic implementation of state-space realization of the IIR digital filters is presented. The technique used is based on block-state description in which the state update matrix is full. The new implementation has significantly reduced number of processor elements while simultaneously maintaining a high input sampling rate

Published in:

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94  (Volume:4 )

Date of Conference:

30 May-2 Jun 1994