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An analysis of finite register length effects on arithmetic codes

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1 Author(s)
Shaw-Min Lei ; Bellcore, Red Bank, NJ, USA

Arithmetic coding is a powerful lossless data compression technique that has attracted much attention in recent years. In this paper, we give a quantitative analysis of the performance degradation caused by the finite word-length registers used to compute the arithmetic codes. Such analysis is important for determining the appropriate word length in practical applications. Two algorithms of computing arithmetic codes are discussed. Our analysis results show that the degradation of one algorithm is reduced by half for every increased bit of word length while the degradation of the other algorithm is reduced to a quarter. Computer simulation results are also given to verify the theoretical analysis

Published in:

Circuits and Systems, 1994. ISCAS '94., 1994 IEEE International Symposium on  (Volume:3 )

Date of Conference:

30 May-2 Jun 1994