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Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors

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4 Author(s)
Matteo Monchiero ; Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milano, Italy ; Gianluca Palermo ; Cristina Silvano ; Oreste Villa

Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric interconnect fabrics, such as networks-on-chip (NoC), have been recently proposed. The shared memory represents one of the key elements in designing MP-SoCs, since its function is to provide data exchange and synchronization support. In this paper, a distributed shared memory architecture has been explored, that is suitable for low-power on-chip multiprocessors based on NoC. In particular, the paper focuses on the energy/delay exploration of on-chip physically distributed and logically shared memory address space for MP-SoCs based on a parameterizable NoC. The data allocation on the physically distributed shared memory space is dynamically managed by an on-chip hardware memory management unit. Experimental results show the impact of different NoC topologies and distributed shared memory configurations for a selected set of parallel benchmark applications from the power/performance perspective

Published in:

2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

Date of Conference:

July 2006