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A fully automated, stroboscopic electrobeam test system that analyzes the behavior of logic VLSI circuits, this system consists of a stroboscopic electron-beam tester combined with an LSI CAD system. LSI circuit design data, read from the CAD system, provides a designed map. The host computer performs interconnection pattern recognition by superimposing this map onto an observed stroboscopic SEM image. Then, once the circuit nodes for voltage waveform measurements are automatically determined on the superimposed map. Next, the electron beam is positioned on the actual circuit-under-test wires. These automatic processes result in measured waveforms, which are displayed on the host computer terminal. This system has been applied to a 2.3K-gate logic LSI circuits, and has been successful in locating the critical path. This system, coupled with the recently developed fault diagnostic electron-beam tester, Finder, constitutes a unified electron-beam test system.