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LORES-2 is a logic reorganization system which greatly contributes to the effective automation of logic design. LORES-2 uses a macro-expansion technique to help designers transform printed-circuit assembly logic composed of SSI and MSI circuits into master-slice LSI logic circuits. The number of gates of the most reorganized LSI circuit falls within Â± 20 percent of the number of gates of the original circuit. When ROMS and/or PLAs are not-allowed on the target LSI circuit, those elements are converted into optimized, multilevel random logic using logic minimization, factoring and macro-expansion techniques.
Date of Publication: Oct. 1985