By Topic

Test function embedding algorithms with application to interconnected finite state machines

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Kanjilal, S. ; Dept. of Comput. Sci., Rutgers Univ., New Brunswick, NJ, USA ; Chakradhar, S.T. ; Agrawal, V.D.

We present new algorithms for embedding test functions into the state diagram of a finite state machine. We first identify the cases where test functions can be embedded into the state diagram of the given object machine without using an extra input line. When such embedding is possible, our method finds it. In other cases, an extra input line must be added to the object machine to make the embedding possible. For the extra input case, we use partition theory and state variable dependencies in the object machine to obtain a mapping of the test machine states onto the object machine states. This mapping introduces a minimum number of extra state variable dependencies in the augmented machine as compared to the dependencies in the object machine. Experimental results on several MCNC benchmarks show that our method yields augmented machine implementations that have lower area than corresponding full scan designs. The test generation complexity for the augmented machine implementation is the same as that for a full scan design. We further consider the embedding of test functions into machines specified as an interconnection of finite state machines. We incorporate test functions into each component finite state machine such that the augmented interconnected machine has the same testability properties as the product machine with test function

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:14 ,  Issue: 9 )