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Frequency Multiplication with Nonlinear Capacitors-A Circuit Analysis

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2 Author(s)
Leeson, D.B. ; Dept. Elec. Engrg., Stanford University, Stanford, Calif Formerly Res. Lab. of Electronics, Mass, Inst. Tech., Cambridge, Mass ; Weinreb, S.

This paper presents a circuit analysis of frequency multipliers employing nonlinear capacitors. The analysis applies to the case of a multiplier of any order using semiconductor nonlinear capacitors, and specifies impedance levels, power capabilities, and efficiency in terms of the characteristics of the nonlinear element and the associated linear network. From the formulas derived it is possible to specify the optimum nonlinear characteristic for a given circuit and harmonic number, and to calculate the conditions for maximum efficiency. The procedure is also applicable to frequency dividers, and to frequency multipliers employing nonlinear induct ance.

Published in:

Proceedings of the IRE  (Volume:47 ,  Issue: 12 )

Date of Publication:

Dec. 1959

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