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An Error-Correcting Encoder and Decoder of High Efficiency

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2 Author(s)
Green, J.H. ; Sylvania Electronics Sys., Amherst Eng. Labs., Williamsville, N.Y. ; San Soucie, R.L.

A report is given on a group effort which has demonstrated the applicability of regenerative shift register sequences to error-correcting codes. It is shown that a triple-error-correcting code of high efficiency can be formed by using the 15 cyclic permutations of a 15-bit, maximal-length, shift register sequence, a 15-bit zero sequence, and the 1-0 complements of the 16 sequences. It is further shown that the interrelationships between the bits of these binary sequences can be used to design a decoder of extreme simplicity.

Published in:

Proceedings of the IRE  (Volume:46 ,  Issue: 10 )