By Topic

Design and Fabrication of a High Performance LDMOSFET with Step Doped Drift Region on Bonded SOI Wafers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Yufeng Guo ; College of Optioelectronic Engineering, Nanjing University of Posts and Telecommunications, Nanjing, Jiangsu, 210003, P.R.China. Email: ; Zhaoji Li ; Bo Zhang

The SOI LDMOSFETs with step doping profiles in drift region have been experimentally investigated. Uniform, single-step and two-step doped drift regions have been designed and fabricated on a same bonded SOI wafer with the top silicon layer of 3 mum and buried oxide layer of 1.5 mum. The experimental devices with two-step doping profile have a breakdown voltage in access of 250 V and specific on-resistance of 1.6 Omegamm2. Furthermore, the breakdown characteristic and forward conduction characteristic for the various step doping profiles were measured and compared. The results show two-step doping can enable increase in the breakdown voltage by 40% and decrease in on-resistance by 16% in comparison to the conventional uniformly doped drift device.

Published in:

2006 International Conference on Communications, Circuits and Systems  (Volume:4 )

Date of Conference:

25-28 June 2006