By Topic

A Novel Feedback Block Cipher Based on the Chaotic Time-Delay Neuron System and Feistel Network

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Jun Peng ; Coll. of Electron. Inf. Eng., Chongqing Univ. of Sci. & Technol. ; Xiaofeng Liao ; Zhiming Yang

In this paper, we propose a novel feedback block chaotic cipher algorithm (FBCCA) based on the chaotic time-delay neuron system and feistel network. The inherent features of chaotic system make the cryptosystem more complex and more difficult to be analyzed or predicted. In FBCCA, the output ciphertext block corresponding to the current input plaintext block is fed back into the generation process of the number of round, which will be used for encrypting the next plaintext block. Furthermore, the round numbers (times iterated for each block) and the sequence number of S-box (used in each round) have a closely relationship with the secret key, and both are dynamically generated by chaotic system. The results of computer simulation experiments show that the proposed cipher has excellent cryptographic properties, i.e., the cipher is very sensitive with respect to the slight change of the plaintext and the secret key, and the randomicity of the ciphertext is very ideal. At last, the security of the algorithm is studied, and the results indicate that the algorithm possesses higher capability of resisting the brute-force attack. Some further studies are also suggested in this paper

Published in:

Communications, Circuits and Systems Proceedings, 2006 International Conference on  (Volume:3 )

Date of Conference:

25-28 June 2006