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Code compression techniques have been proposed to mitigate the problem of limited memory resources in embedded systems. As technology scales, reducing on-chip bus energy consumption is becoming important for embedded system designers. In this paper, we propose a crosstalk-aware energy-efficient code compression scheme, which can reduce inter-wire coupling transition induced instruction bus energy consumption, without sacrificing compression ratio. The experimental results show that the bus power consumption due to inter-wire coupling transition alone is reduced by 42-68% and the total bus power consumption is reduced by 55-71% for TMS320C6x benchmarks.