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Design Space Exploration using Parameterized Cores: A Case Study

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2 Author(s)
Ian D. L. Anderson ; Department of Electrical and Computer Engineering, Research Centre for Integrated Microsystems (RCIM), University of Windsor, Windsor, Ontario, Canada. e-mail: ; Mohammed A. S. Khalid

Today, many designers of embedded systems are choosing to build their systems using parameterized intellectual property (IP) cores, which are hardware or software components which allow certain aspects of their architecture to be changed and set at design-time. Design space exploration (DSE) is the process of determining the best combination of parameter values from the complete set of possible designs. Designs are evaluated in terms of their objectives-usually IC chip area, power consumption and system performance. Often, automated approaches are used to prune the design space in search of the Pareto-optimal set of designs. One of the most common approaches involves using a genetic-algorithm (GA) based approach to determine this set from the complete design space. In this paper, we present the results of a case study involving the Altera Nios parameterized soft-core processor. The goal of this study is to determine the Pareto-optimal set of design configurations for the Nios processor using a genetic-based approach-the simple evolutionary algorithm for multi-objective optimization (SEAMO). From this study we conclude that genetic-based approaches can be useful in assisting designers to make intelligent choices for parameter selection

Published in:

2006 Canadian Conference on Electrical and Computer Engineering

Date of Conference:

May 2006