Cart (Loading....) | Create Account
Close category search window
 

A Design Method and Structure of Kernel for Sampling Rate Converter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Mori, Y. ; Dept. of Electron. & Commun., Salesian Polytech., Machida-City ; Nagasawa, K. ; Aikawa, N.

In this paper, we propose arbitrary block structures of a kernel with nth polynomials and block ratio, and its design method for sampling rate converter. Because the proposed kernels are polynomial based, they can be efficiently implemented using the Farrow structure for the real time applications. In order to obtain a large attenuation, we design the kernel in the frequency domain using a modern optimization methodology known as semidefinite programming (SDP). The sampling rate changed fractional number is possible by the proposed kernel. Finally, effectiveness of the proposed kernel is verified through an example

Published in:

Signal Processing Symposium, 2006. NORSIG 2006. Proceedings of the 7th Nordic

Date of Conference:

7-9 June 2006

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.