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ASIC design and implementation of an associative memory processor for syntactic recognition

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4 Author(s)
N. Correa ; Dept. of Electr. Eng., Los Andes Univ., Bogota, Colombia ; A. Garcia ; H. Burbano ; W. Ricaurte

This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD)

Published in:

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Date of Conference:

19-23 Sep 1994