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A self timed interrupt controller: a case study in asynchronous micro-architecture design

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3 Author(s)
A. de Gloria ; Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy ; P. Faraboschi ; M. Olivieri

We report the results of the design and layout simulation of an interrupt controller dedicated to the SGS-Thomson ST9 microprocessor family. The unit is composed of a delay insensitive local control-path and a synchronous local data-path for priority computations. The local control-path is automatically synthesised out of an Occam algorithmic specification, while the local data-path is made up of conventional hardware units. Layout simulation shows that the average time for an interrupt to be served is reduced to 28%

Published in:

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Date of Conference:

19-23 Sep 1994