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Investigation of Drain Disturb in SONOS Flash EEPROMs

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4 Author(s)
Bharath Kumar, P. ; Dept. of Electr. Eng., Indian Inst. of Technol., Mumbai ; Sharma, R. ; Nair, P.R. ; Mahapatra, S.

The mechanism of drain disturb is studied in silicon-oxide-nitride-oxide-silicon Flash electrically erasable programmable read-only memory cells. It is shown that disturb is a serious problem in programmed cells and is caused by injection of hot holes from substrate into the oxide/nitride/oxide stack. The origin of these holes is identified by analyzing the influence of halo doping, channel doping, and channel length scaling on drain disturb. Band-to-band tunneling at the drain junction is normally the dominant source of these holes. It is also shown that holes generated out of impact ionization of channel electrons become dominant in cells with high channel leakage (especially at lower channel lengths). Finally, the effect of repeated program/erase cycling on drain disturb is studied. Drain disturb becomes less severe with cycling, the reasons for which are determined using gate-induced drain leakage measurements and device simulations

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Electron Devices, IEEE Transactions on  (Volume:54 ,  Issue: 1 )