Cart (Loading....) | Create Account
Close category search window
 

Bond Pad Design With Low Capacitance in CMOS Technology for RF Applications

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Yuan-Wen Hsiao ; Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu ; Ming-Dou Ker

A new bond pad structure in CMOS technology with low capacitance for gigahertz radio frequency applications is proposed. Three kinds of inductors stacked under the pad are used in the proposed bond pad structure. Experimental results have verified that the bond pad capacitance is reduced due to the cancellation effect provided by the inductor embedded in the proposed bond pad structure. The new proposed bond pad structure is fully process-compatible to general CMOS processes without any extra process modification

Published in:

Electron Device Letters, IEEE  (Volume:28 ,  Issue: 1 )

Date of Publication:

Jan. 2007

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.