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Array Networks for a Parallel Adder and Its Control

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1 Author(s)
I. Aleksander ; Dept. Elec. Engrg., Queen Mary College, University of London, London E.1., England.

A collection of array-like networks of two-input AND gates is described with particular reference to their use in a parallel adder. These networks have properties which facilitate their incorporation in high-capability monolithic circuits. This leads to the adoption of a radix R and a one-in-R binary code. A decimal system is discussed and compared with a pure binary one. The application of the array networks to other digital tasks is illustrated by the design of routing circuits which enable the adder to subtract, multiply, and divide.

Published in:

IEEE Transactions on Electronic Computers  (Volume:EC-16 ,  Issue: 2 )