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A Computer-Oriented Factoring Algorithm for NOR Logic Design

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2 Author(s)
Dietmeyer, D.L. ; Department of Electrical Engineering, University of Wisconsin, Madison, Wis. ; Schneider, P.R.

Because transistor NOR gates allow only a liitmed number of inputs, NOR equations must be factored before they can be implemented. An easily programmed algorithm is developed which rapidly generates a subset of factors, selects optimum factors, and indicates a realization for the factored equation based on the relation A ¿ B ¿ C ¿ D = [(A ¿ B) ¿] ¿ C ¿ D. A method for preventing excessive fan-out is also presented.

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Electronic Computers, IEEE Transactions on  (Volume:EC-14 ,  Issue: 6 )