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Implications of Characterization Temperature on Hardness Assurance Qualification

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8 Author(s)
Shaneyfelt, M.R. ; Sandia Nat. Labs., Albuquerque, NM ; Schwank, J.R. ; Dodd, P.E. ; Hash, G.L.
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To explore the impact of temperature on the post-irradiation response of ICs, we characterized the temperature response of transistors, SRAMs, and a custom mixed-signal ASIC. Devices were irradiated at room temperature and electrically characterized post irradiation as a function of temperature. Devices exhibit significantly more parametric degradation when characterized at elevated temperatures. In addition to parametric degradation, it is demonstrated that post-irradiation elevated temperature characterization can also induce functional failures at significantly lower total dose levels than at room temperature. As a result, to ensure system functionality, it is essential that devices be characterized over the full system temperature range pre- and post-irradiation. Recommendations for incorporating temperature testing into a hardness assurance test method (i.e., Method 1019) are suggested. Methods for minimizing the detrimental effects of elevated temperature anneals on hardness assurance testing are also discussed

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Nuclear Science, IEEE Transactions on  (Volume:53 ,  Issue: 6 )