By Topic

An SEU-Robust Configurable Logic Block for the Implementation of a Radiation-Tolerant FPGA

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Bonacini, S. ; Inst. Nat. Polytech. de Grenoble ; Faccio, F. ; Kloukinas, K. ; Marchioro, A.

Within the perspective of the development of a radiation-tolerant SEU-robust reprogrammable FPGA, a user-configurable Logic Block was designed in a CMOS 0.25 mum technology. The configuration bits are stored in SEU-robust registers as well as the user data. The design takes care of minimizing the possibility of SET coming from the combinatorial logic. The Logic Block can implement any boolean expression of 4 variables, has a carry propagation infrastructure and a user-register. A set of Logic Blocks can be organized to form more complex logic functions. A test chip was fabricated and tested in a heavy-ion beam facility. Testing demonstrated the SEU robustness of the circuit up to an LET of 79.6 cm2 MeV/mg and a small sensitivity at higher LETs

Published in:

Nuclear Science, IEEE Transactions on  (Volume:53 ,  Issue: 6 )