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Capacitive Inter-Chip Data and Power Transfer for 3-D VLSI

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2 Author(s)
Eugenio Culurciello ; Dept. of Electr. Eng., Yale Univ., New Haven, CT ; Andreas G. Andreou

We report on inter-chip bidirectional communication and power transfer between two stacked chips. The experimental prototype system components were fabricated in a 0.5-mum silicon-on-sapphire CMOS technology. Bi-directional communication between the two chips is experimentally measured at 1Hz-15 MHz. The circuits on the floating top chip are powered with capacitively coupled energy using a charge pump. This is the first demonstration of simultaneous nongalvanic power and data transfer between chips in a stack. The potential use in 3-D VLSI is aimed at reducing costs and complexity that are associated with galvanic inter-chip vias in 3-D integration

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IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:53 ,  Issue: 12 )