A new design approach for High-T/sub c/ based RSFQ logic

We suggest a new design of Rapid Single Flux Quantum (RSFQ) logic circuits which is based on a single superconducting layer and does not require a superconducting ground plane. The small inductances of about 10 pH, that are obligatory for the RSFQ applications, are formed as narrow slits with width comparable to the London penetration depth (/spl cong/0.15 /spl mu/m). The design allows us to decrease the geometric size of the RSFQ cell and can be applied to low-T/sub c/ circuits as well. Test circuits have been implemented using YBaCuO grain boundary junctions on assymmetric 32/spl deg/Y-ZrO/sub 2/ bi-crystals to measure the slit inductance per unit length and the mutual inductance of neighboring slits. A typical inductance of a 0.4 pm slit was determined to be 0.7pH//spl mu/m. We present a new design and a computer simulation of a flip-flop circuit based on these inductance measurements. To realize these circuits experimentally one needs at least two grain boundaries, separated by a distance of 10 to l5 /spl mu/m, or to use bi-epitaxial or step-edge junction technology.<
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