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A Merged LNA-Mixer Design with On-Chip Balun

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5 Author(s)
Hsien-Ku Chen ; Nat. Appl. Res. Labs., Nat. Chip Implementation Center, Hsinchu ; Sha, J.R. ; Da-Chiang Chang ; Juang, Y.-Z.
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In this paper, the design and application of an on-chip transformer balun for RFIC has presented. Single-ended primary and differential secondary are constructed without using three individual windings for simple layout. Besides, this new topology has the same physical common visual ground point for second winding, which eliminates imbalance due to potential difference at the ground from conventional trifilar. Furthermore, this new on-chip balun is successfully applied to the integration of 5.8-GHz LNA-mixer implemented on SiGe 0.35-mum BiCMOS process then achieves 4.15-dB noise figure (NF), 34.61-dB conversion gain, and -9.5-dBm input third-order intercept-point with low power consumption of 9-mW

Published in:

VLSI Design, Automation and Test, 2006 International Symposium on

Date of Conference:

26-28 April 2006