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Design of a Redundant Paralleled Voltage Regulator Module System with Improved Efficiency and Dynamic Response

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4 Author(s)
Santanu K. Mishra ; International Rectifier, Rhode Island IC Design Center, 200 Circuit Drive, North Kingstown, RI 02852. Phone: 401-667-0238, Fax: 401-667-0240, Email: ; Steve Zhou ; Wenkang Huang ; George Schuellein

This paper discusses the design of true redundant, N+l parallel voltage regulator module (VRM) system with low droop resistance. Average current mode control and limited gain for voltage compensation is used to achieve droop current sharing between parallel modules without single point failure. Small signal model of the current sharing scheme is derived and experimentally validated. A novel local sense feedback is used to improve the dynamic performance of the parallel system. Experimental results from a prototype confirm the current sharing between two VRMs to be within 10 % and the dynamic response improvement by 33 % due to local sense feedback

Published in:

Conference Record of the 2006 IEEE Industry Applications Conference Forty-First IAS Annual Meeting  (Volume:5 )

Date of Conference:

8-12 Oct. 2006