Referenced Items are not available for this document.
This paper presents a framework for rapid development of FPGA based custom processors based on floating-point calculation units. The framework consists of a fully parameterized floating-point library, an easy-to-use pipeline generator and an interface generator for memory and I/O-modules. The performance of this approach is shown for the implementation of an SPH-algorithm.
Published in:
Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
Date of Conference: 24-26 April 2006
- Page(s):
- 301 - 302
- Print ISBN:
- 0-7695-2661-6
- INSPEC Accession Number:
- 9274774
- Conference Location :
- Napa, CA
- Digital Object Identifier :
- 10.1109/FCCM.2006.60
- Product Type:
- Conference Publications
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