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The Power Conscious Synergistic Processor Element of a Cell Processor

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10 Author(s)
Osamu Takahashi ; IBM Systems and Technology Group, Austin, TX ; Scott Cottier ; Sang H. Dhong ; Brian Flachs
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A 4-way SIMD streaming processor of a cell processor is developed in a 90nm SOI technology. CMOS static gates implement the majority of the logic. Dynamic circuits are used in critical areas, occupying 19% of the non-SRAM area. ISA, microarchitecture, and physical implementation are co-optimized to achieve a compact and power efficient design

Published in:

2005 IEEE Asian Solid-State Circuits Conference

Date of Conference:

Nov. 2005