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The Power Conscious Synergistic Processor Element of a Cell Processor

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10 Author(s)

A 4-way SIMD streaming processor of a cell processor is developed in a 90nm SOI technology. CMOS static gates implement the majority of the logic. Dynamic circuits are used in critical areas, occupying 19% of the non-SRAM area. ISA, microarchitecture, and physical implementation are co-optimized to achieve a compact and power efficient design

Published in:

Asian Solid-State Circuits Conference, 2005

Date of Conference:

Nov. 2005