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Fundamental Research of No-Flow UF for Low Stress Flip-Chip Package

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6 Author(s)

Recently, most of semiconductor companies are developing high density packages using lead free solder and low-k layer. The melting temperature of lead free solder is higher than the eutectic solder. Therefore, the reflow profile for lead free solder is higher approximately 30 degrees C than the conventional profile. When a high temperature profile is used, the organic substrate is expanded and the package stress becomes higher. Furthermore, bump cracking by the package stress is concerned, because lead free solder is very fragile. In addition, it is easy to destroy the low-k layer by the package stress such as the package's warpage. Thus the stress control is necessary for the assembly process of high density packages using lead free solder and low-k layer. It is effective to use no-flow underfill (NUF) with local reflow process using a flip chip bonder (FCB). This process can realize an assembly with lower stress compared with capillary flow underfill (CUF) reflow process, because the organic substrate should not be exposed to a high temperature and is controlled not to expand much. NUF characteristics for local reflow process are investigated. At first, NUF curability and the influence of flux-ability for the solder connection were evaluated using NUF which was based on the epoxy resin and different kinds of hardeners. It was confirmed that solder connection was affected by NUF curability and the flux-ability were influenced by the hardener type. Then filler loading level was optimized to reinforce the solder joint. We improved the mismatch between IC chip and substrate in the C.T.E (coefficient of thermal expansion). NUF of various filler contents were evaluated under reliability tests such as moisture reflow test, temperature cycle test, and high temperature/high humidity test. Finally the package stress with a low stress NUF was evaluated by shadow moire technique. As a result, it was confirmed that the package by local reflow process had a lower stress than t- - he package by conventional process

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High Density Microsystem Design and Packaging and Component Failure Analysis, 2005 Conference on

Date of Conference:

27-29 June 2005

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