Referenced Items are not available for this document.
Fast component of Vth instability in MOSFET with HfO 2 gate dielectric is systematically measured and characterized. A charge-trapping/detrapping model is used to simulate the Vth instability with overall agreement with the experiments. Experimental and modeling data provide and predict the fast Vth shift under both static and dynamic stress conditions. These data are incorporated into HSpice circuit simulation to evaluate the impact of Vth shift on the performance of digital circuit in realistic situations. Considering the properties of the fast Vth instability, circuit performance can be optimized by circuit design in addition to process improvements. This should be included to the guideline of process development and circuit design for future CMOSFET digital systems
Published in:
Electron Devices, IEEE Transactions on
(Volume:53
,
Issue:
12
)
Date of Publication: December 2006
- Page(s):
- 3001 - 3011
- ISSN :
- 0018-9383
- INSPEC Accession Number:
- 9381872
- Digital Object Identifier :
- 10.1109/TED.2006.885680
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 30 November 2006
- Issue Date :
- December 2006
- Sponsored by :
- IEEE Electron Devices Society
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